Forward compatible and expandable high speed communications system &amp; method of operation

ABSTRACT

A high speed communications system is provided which uses a selectable, desirable portion of the total available bandwidth of a transmission channel. In a preferred embodiment, the invention is an ADSL compatible modem which selects a sub-set of the available downstream DMT sub-channels based on an evaluation of such sub-channels by appropriate signal processing circuitry. An analog front end (AFE) contains sub-band filtering causes an upstream transceiver to use only this selected number of available sub-channels for downstream data transmission. This reduces hardware costs and complexity while still preserving compatibility with applicable ADSL standards and providing a high speed data link. The target data rate of the modem can be further enhanced to the point of achieving fill protocol capability by increasing or upgrading the AFEs, and/or the signal processing circuitry in order to increase the number of processable transmitted downstream sub-channels.

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] The present application is related to the following additionalapplications, all of which are being filed concurrently herewith:

[0002] Attorney Docket No. ITE 97-002 entitled “Rate Adaptable ModemWith Forward Compatible and Expandable Functionality & Method ofOperation.”

[0003] Attorney Docket No. ITE 97-003 entitled “Software Rate AdaptableModem With Forward Compatible and Expandable Functionality & Method ofOperation.”

[0004] Attorney Docket No. ITE 97-004 entitled “Modular MultiplicativeData Rate Modem & Method of Operation.”

[0005] Attorney Docket No. ITE 97-005 entitled “Device Driver For RateAdaptable Modem With Forward Compatible and Expandable Functionality”

[0006] Attorney Docket No. ITE 97-006 entitled “User ControllableApplications Program For Rate Adaptable Modem With Forward Compatibleand Expandable Functionality.”

FIELD OF THE INVENTION

[0007] The invention relates generally to an improved high-speedcommunications system which establishes a data link using only aselectable portion of the total available bandwidth of a channel. Thepresent invention has particular applicability to systems which use rateadaptable techniques such as the discrete multi-tone modulation (DMI)technique and CAP for transmitting data in Digital Subscriber Lines andsimilar environments. By limiting the data throughput of the link tosome adjustable fraction of the total available data rate, the presentinvention significantly reduces hardware costs and allows a downstreamuser to configure a data link whose performance is directly controllableby the processing power available to such user. In this manner, thesystem is completely forward compatible and expandable in functionality,and permits a user to increase throughput to the point of achieving fullpotential of the available channel bandwidth.

BACKGROUND OF THE INVENTION

[0008] Remote access and retrieval of data and information are becomingmore desirable and common in both consumer and business environments. Asdata and information transfer is becoming more and more voluminous andcomplex, using traditional data links such as voice-band modems is tooslow in speed. For example, the use of the Internet to locate and accessinformation is increasing daily, but the retrieval of typical graphics,video, audio, and other complex data forms is generally unsatisfyinglyslow using conventional voice-band modems. In fact, the slow state ofexisting dial-up analog modems frustrates users, and commerce andinteraction using the Internet would have been even higher were it notfor the unacceptable delays associated with present day accesstechnology. The ability to provide such desired services as video ondemand, television (including HDTV), video catalogs, remote CD-ROMs,high-speed LAN access, electronic library viewing, etc., are similarlyimpeded by the lack of high speed connections.

[0009] Since the alternatives to copper line technology have provenunsatisfactory, solutions to the high speed access problem have beenfocused on improving the performance of voice band modems. Voice bandmodems operate at the subscriber premises end over a 3 kHz voice bandlines and transmit signals through the core switching network; the phonecompany network treats them exactly like voice signals. These modemspresently transmit up to 33.6 kbps over a 2-wire telephone line, eventhough the practical speed only twenty years ago was 1.2 kbps. Theimprovement in voice band modems over the past 20 years has resultedfrom significant advances in algorithms, digital signal processing, andsemiconductor technology. Because such modems are limited to voicebandwidth (3.0 kHz), the rate is bound by the Shannon limit, around 30kbps. A V0.34 modem, for example, achieves 10 bits per Hertz ofbandwidth, a figure that approaches the theoretical Shannon limits.

[0010] There is a considerable amount of bandwidth available in copperlines, however, that has gone unused by voice band modems, and this iswhy a proposal known as Asymmetric Digital Subscriber Line (ADSL) wassuggested in the industry as a high-speed protocol/connectionalternative. The practical limits on data rate in conventional telephoneline lengths (of 24 gauge twisted pair) vary from 1.544 Mbps for an18,000 foot connection, to 51.840 Mbps for a 1,000 foot connection.Since a large proportion of current telephone subscribers fall withinthe 18,000 foot coverage range, ADSL can make the current copper wireact like a much “bigger pipe” for sending computer bits and digitalinformation (like movies and TV channels), while still carrying thevoice traffic. For example, an ADSL modem can carry information 200times faster than the typical voice band modem used today.

[0011] ADSL is “asymmetric” in that more data goes downstream (to thesubscriber) than upstream (back from the subscriber). The reason forthis is a combination of cost, demand, and performance. For example,twisted pair wiring coupling increases with the frequency of the signal.If symmetric signals in many pairs are used within a cable, the datarate and line length become significantly limited by the coupling noise.Since the preponderance of target applications for digital subscriberservices is asymmetric, asymmetric bit rate is not perceived to be aserious limitation at this time. Therefore, the ADSL standard proposesup to 6 Mbps for downstream, and up to 640 kbps for upstream. Forexample, video on demand, home shopping, Internet access, remote LANaccess, multimedia access, and specialized PC services all feature highdata rate demands downstream, to the subscriber, but relatively low datarates demands upstream. The principal advantage is that all of the highspeed data operations take place in a frequency band above the voiceband, leaving Plain Old Telephone Service (POTS) service independent andundisturbed, even if an ADSL modem fails. ADSL further provides aneconomical solution for transmission of high bandwidth information overexisting copper line infrastructures.

[0012] Specifically, the proposed standard for ADSL divides theavailable transmission bandwidth into two parts. At the lower 4 kHzband, ordinary (POTS) is provided. The bulk of the rest bandwidth in therange from 4 kHz to about 1 MHz is for data transmission in thedownstream direction, which is defined to be from the exchange to thesubscriber. The upstream control channel uses a 160 kHz band in between.The signals in each channel can be extracted with an appropriateband-pass filter.

[0013] A DMT implementation of ADSL uses the entire available 1 MHzrange of a copper phone line. It merely splits the signal into 255separate channels, and each 4 kHz channel can be made to provide a bitrate up to the best present day voice band (33.6 kbs) modems. Thisresults essentially in overall performance which is equivalent to aroundtwo hundred V0.34 modems used in parallel on the same line. Because eachchannel can be configured to a different bit rate according to thechannel characteristics, it can be seen that DMT is inherently“rate-adaptive” and extremely flexible for interfacing with differentsubscriber equipment and line conditions.

[0014] A number of problems arise, however, in attempting to implement afull scale ADSL transceiver cost-effectively.

[0015] First, to achieve this high bit rate transmission over existingtelephone subscriber loops, advanced analog front end (AFE) devices,complicated digital signal processing techniques, and high speed complexdigital designs are required. As a result, this pushes currenttechnology limits and imposes both high cost and power consumption. Forexample, AFE devices in modem applications provide the interface betweenanalog wave forms and digital samples for digital hardware/softwareprocessing. In high speed modem technologies such as ADSL, AFE devicesneed to operate at a very high sampling rate and high accuracy. Forexample, the DMT technology has a spectrum of 1 MHz and requiressampling above 50 MHz if a sigma-delta analog-to-digital (ADC) method isused. This thus requires the state-of-art ADC technology and imposes ahigh cost for end users.

[0016] Second, the time domain signal in ADSL/DMT transmissions is asummation of a large number of carriers modulated by quadratureamplitude modulation (QAM). This typically results in a largepeak-to-peak deviation. As a result, even though a high speed AFE ismade possible, a large dynamic range and high resolution AFE is requiredat the same time to minimize quantization errors.

[0017] Third, in addition to the high sampling rate and resolutionrequirement for ADSL AFEs, the other hardware and software in ADSLenvironment also needs to operate at a much higher speed than currentconventional modem counterparts. For example, to implement the DMTtechnology in software, a custom and dedicated digital signal process(DSP) of a power of several hundred MIPS (millions instructions persecond) is required to process many components such as error encodingand decoding, spectrum transforms, timing synchronization, etc. As withthe AFE part of the system, this high speed requirement for the signalprocessing portion of ADSL also results in less flexible, high componentcosts.

[0018] Fourth, requiring a communications device (such as a modem) tofully support the total throughput of a standard such as ADSL may beinefficient in some cases, since many prospective users of high-speeddata links may not need to use all the available bandwidth provided bysuch standards. It is generally more preferable therefore to permitusers to throttle or scale the data throughput in a manner they cancontrol, based on their particular application needs, hardware costbudget, etc. For example, a full-scale ADSL system may have theperformance level of 200 times conventional V0.34 modems, but it isapparent that even a performance improvement of 10-20 times than presentday available analog modems would be sufficient for many consumerapplications, such as Internet access and similar uses. Thus, unlikeconventional analog modems, which are available in various speedsvarying generally from 14.4 to 56 Kbps, there are no known ADSL modemswhich offer scalable performance levels to users.

[0019] Fifth, in addition to the implementation challenge, the T1E1.4ADSL standard does not specify the system interface and user model.Although various high level interface to support T1/E1, ATM, etc. havebeen described, system integration with high level protocols such asTCP/IP and interface with computer operating systems have not yet beendefined. As a result, there is uncertainty how existing and futuremodem-based applications can work with the ADSL technology. For example,when users run an Internet application which sends and receives data toand from an Internet service provider (ISP), a mutually agreed protocolis required to set up a call and transfer data. Possible protocolsavailable at various levels include ATM (asynchronous transfer mode),TCP/IP, ISDN, and current modem AT commands. Either one of these or apossibly new protocol needs to be defined to facilitate the adoption ofADSL technology.

SUMMARY OF THE INVENTION

[0020] An object of the present invention therefore is to provide acommunications system which is fully compatible with high speed, rateadaptable protocols such as are used with ADSL, but which system isnevertheless implementable with simpler analog front endreceiving/transmitting circuitry and is thus reduced in cost andcomplexity;

[0021] A further object of the present invention is to provide acommunications system which is fully compatible with high speed, rateadaptable modulation protocols such as used with ADSL, but which systemis nevertheless implementable with simpler digital signal processingcircuitry and is thus reduced in cost and complexity;

[0022] Another objective of the present invention is to provide a methodfor transmitting data within a fractional, desirable portion ofavailable bandwidth in a channel by modulating only a limited number ofdesirable sub-channel data carriers, so that a high speed data link canbe achieved that is faster, and has reduced computation and hardwaredemands;

[0023] Yet a further objective of the present invention is to provide acommunications system with smaller peak-to-peak deviation in thesub-channels signals, so as to reduce the dynamic range required for thefront end ADC, and to minimize quantization errors.

[0024] Another objective of the present invention is to provide a highspeed communications system having a data throughput that is easilycontrollable and expandable, so that the performance range of suchsystem can be configured to any fractional percentage of total bandwidthavailable in a transmission channel, up to and including full bandwidthuse of the channel;

[0025] A related objective of the present invention is to provide a highspeed communications system that is modular so that forward compatibleand expandable functionality can be incorporated flexibly and with aminimum of effort on the part of a user of such system;

[0026] Yet a further objective is to provide a system that is compatiblewith high speed protocols used in ADSL, but which is also easilyadaptable to support preexisting high level data protocols, includingthose presently used for controlling high speed voice band modems;

[0027] A further object of the present invention is to provide a highspeed communications system that self-calibrates its own performancelevel, based on the processing power available to such system;

[0028] Another objective of the present invention is to provide a highspeed communications system that permits a user to configure theperformance parameters of such system using conventional personalcomputer hardware, software and operating systems;

[0029] A further object of the present invention is to provide aninterface between a host operating system and a high speedcommunications system that provide forward compatible and expandablefunctionality;

[0030] An additional aim of the present invention is to provide animproved system for concurrent control of conventional voice datatraffic on a POTS channel, and upstream/downstream communications onseparate sub-channels;

[0031] These objects and others are accomplished by providing acommunications system that permits a host processing device to receiveselected data within a narrow bandwidth from an upstream transcieverwhich can and normally transmits a large bandwidth analog datatransmission signal through a connected channel. A channel interfacecircuit AFE samples the received analog signal to generate a digitalsignal. Only a limited portion of the bandwidth may be sampled, thusreducing front end complexity. A digital signal processing circuit thenextracts the selected data from this limited digital signal, which issignificantly easier to process than a full bandwidth digital signal.Feedback information is provided back to the upstream transmitter whichcauses the upstream transmitter to transmit downstream data thereafteronly using the limited bandwidth of the front end, and not the fillbandwidth. This feedback information contains information about thechannel that suggests to the upstream transmitter that the otherbandwidth in the channel is unusable. In this manner, the upstreamtransceiver is trained to accommodate the lower rate downstreamtransceiver in a manner that nevertheless preserves protocol integrity.

[0032] In a preferred embodiment, the large bandwidth analog datatransmission signal is comprised of a number of DMT modulatedsub-channels, and an anti- aliasing filter on the front end of the thedownstream transceiver ensures that only a limited number of suchsub-channels are processed by a DMT signal processing core. The feedbackinformation consists of non-zero SNR information for the selectedsub-channels, and a sub-channel blackout “mask” to eliminate thepotential use of other sub-channels. The feedback information is sent byway of a front end transmitting circuit which transmits an upstream datatransmission using a second frequency range different from thedownstream transmission.

[0033] One implementation of the aforementioned high speed system is ina personal computer, so that the signal processing can be accomplishedusing a processor within such computer, which in a preferred embodimentis an X86 compatible processor. Another implementation of theaforementioned high speed system uses a dedicated signal processor fordemodulating the selected sub-channels. This cuts down on processingoverhead requirements for a host processing system incorporating thesystem. In such implementations the portion of the downstream datatransmission to be processed for data extraction can be configured by auser of such systems, or alternatively, it can be dynamically determinedbased on an evaluation by the digital signal processing circuit ofperformance characteristics of different portions of the frequencyspectrum within the bandwidth potential of the upstream transceiver.

[0034] In another variation, the data rate of a system such as describedabove can be increased by processing data from an additional secondlimited frequency bandwidth portion of the total available downstreambandwidth. In a preferred embodiment, this can be done by including anumber of anti- abasing filters in a modular bank as part of the analogfront end section, each of which passes a different frequency bandwidthportion. By making the analog front end modular, the data rate of theoverall system can be scaled in a controllable and cost-effectivefashion. At the same time, each analog front end portion can be operatedat a slower sampling clock and smaller dynamic range. This results in amore relaxed speed requirement and smaller quantization noise at a givennumber of bits per sample.

[0035] The present disclosure also includes an interface to an operatingsystem, to facilitate controlling the high speed communications systemwhen it is incorporated in a personal computer system. This interfaceensures that the operating system treats such communications systemessentially the same as other prior art voice band modems, and in apreferred embodiment, is a device driver for the Windows NT operatingshell. Finally, the present disclosure also describes an applicationsprogram which permits a user of a personal computer to control theperformance characteristics of the high speed communications system bysetting certain system parameters when such system is incorporated in apersonal computer system. This program includes an auto calibrationroutine for setting such system parameters, or alternatively a user ofsuch program can tailor the settings subject to confirmation of theefficacy of such settings based on an evaluation of the processing poweravailable to such user.

[0036] Although the inventions are described below in a preferredembodiment implementing the ADSL standard, it will be apparent to thoseskilled in the art the present invention would be beneficially used inany high speed rate-adaptable applications.

[0037] It should be noted that while some prior art devices also havelimited mechanisms for achieving a reduction of nominal or peaktransmission speed in a channel, they only activate or implement suchmechanisms as a fallback response to a failure in the channel, orbecause of a transmission rate reduction in the upstream transceiver.Unlike the present invention, such prior art modems, during aninitialization process, attempt to establish the highest possibletransmission rate achievable by the channel and the upstreamtransciever. In other words, any rate reduction imposed by thedownstream modem is typically considered an unintended and undesirableside effect of bad channel characteristics, and not a desirable andintentional design target as set forth in the present invention. Inaddition, the data rate reduction in such modems is accomplishedprimarily by varying the number of bits per baud (hertz) at a fixedfrequency, and not by controlling the overall frequency spectrum of thedownstream data transmission. Moreover, in such prior art systems, noeffort is made to measure, identify or use an optimal portion of theusable bandwidth or set of transmission sub-channels. Instead, suchprior art systems typically use whatever available bandwidth orsub-channels happen to be usable at that instant in time.

[0038] Similarly, while a fixed 300 baud rate downstream modem can workwith an upstream 33kbs rate modem this arrangement is also unlike thepresent invention. This is because, again, the bandwidth reduction insuch prior art device is so large that it is considered commerciallyunusable by today's standards. Furthermore, the smaller bandwidth modemis not compatible with, and does not support, the higher protocols ofthe higher bandwidth modem, which is also undesirable from animplementation standpoint. Stated another way, unlike the presentinvention, the lower end modem limitations of prior art system force thedata link to be set up using a low level protocol that does not takeadvantage of the full capabilities of more advanced protocols.

[0039] Finally, there is no mechanism for users of either of the priorart systems noted above to expand the functionality of such modems in acontrolled, flexible, and modular manner.

BRIEF DESCRIPTION OF THE DRAWINGS

[0040]FIG. 1 is a pictorial depiction of the ADSL/DMT bandwidthallocation for upstream and downstream data in a channel based onfrequency division multiplexing (FDM) configuration.

[0041]FIG. 1B shows the relationship between a sub-band filter and ananalog to digital converter that can be used in an analog front end(AFE) of the present invention ;

[0042]FIG. 1C is a pictorial depiction of a SNR curve for a typicalsubscriber loop channel using sub-channel modulation;

[0043] FIGS. 1D-1G are mathematical modellings and charts that furtherexplain the underlying physical premises of the present invention basedon DMT;

[0044]FIG. 2 is a block diagram of a general implementation of acommunications system employing the present invention, adapted for usein an ADSL environment

[0045]FIG. 3A is a block diagram of a dedicated hardware implementationof a communications system employing the present invention, also adaptedfor use in an ADSL environment;

[0046]FIG. 3B is a block diagram of a mixed hardware an d software basedimplementation of a communications system employing the presentinvention, also adapted for use in an ADSL environment;

[0047]FIG. 4 is a block diagram depicting the general structure of thedata pump device driver used in the mixed implementation shown in FIG.3;

[0048]FIG. 5 is a flowchart depicting the general operation of thecontrol and application interface used in the mixed implementation shownin FIG. 3;

[0049]FIG. 6 is a block diagram of an implementation of a communicationssystem employing the present invention, also adapted for use in an ADSLenvironment, in which it is depicted how a user can modularly expandthroughput capability by adding additional AFE stages to process agreater percentage of the available bandwidth in the channel.

DETAILED DESCRIPTION OF THE INVENTION

[0050] While some of the concepts set forth immediately below arewell-known, a brief explanation of ADSL technology is provided withreference to FIG. 1 to facilitate an understanding of the presentinvention. As explained above, it is well-known in the art to use DMT toeffectuate the ADSL standard. In contrast to most modulation schemes,such as AM/FM transmissions that use one carrier, DMT uses multiplecarriers to transmit data bits. Specifically, T1E1.4 ADSL standardsspecify an up to 255 channels for downstream transmission from thecentral office to subscribers and up to 31 channels for upstreamtransmission from subscribers to the central office. As shown in FIG. 1,each carrier has a bandwidth of 4.3125 kHz. The total bandwidth is 1.1MHz for a total of 255 channels. In the upstream direction, a “pilot”tone in the approximate range of 69 kHz, is used for maintaining timingsynchronization. A similar pilot tone is transmitted in the downstreamdirection in the vicinity of 276 kHz.

[0051] Since upstream and downstream transmissions are over the same2-pair twisted wire, they need to be separated by either echocancellation (EC) or frequency division multiplexing (FDM). Echocancellation allows simultaneous transmissions in both directions butrequires a complex echo canceler implementation. On the other hand, FDMuses two different frequency bands for separate downstream and upstreamtransmissions. As shown in FIG. 1, the upstream transmission usessubchannels from channel number 6 to 31, and the downstream transmissionuses subchannels from channel number 41 to 255. While the remainder ofthe discussion below focuses on an system employing FDM, it will beappreciated by those skilled in the art that the present invention isadaptable and can be used beneficially with echo-cancellation approachesas well.

[0052] As with most communication environments, the transmission bitrates for both upstream and downstream communications in ADSL are notfixed but instead are determined by the quality of the channel. In thepresent invention, a number of well-known techniques can be usedadvantageously for setting up the initial data link. In general, thesetechniques work as follows: during initialization, the channel qualityis measured and a certain data rate (typically a number of bits) isassigned for each DMT subchannel; thereafter, a “hand-shaking” processis used to dynamically and adaptively change the bit loadings (andenergy levels). The latter is often necessary because (among otherthings) changes may occur in the overall channel characteristics,changes in the target bit rate may be needed, or new bit distributionsin the sub-channels may be required because of degradations in one ofthe sub-channels.

[0053] The quality of the sub-channel response can be measured by thereceived signal to noise (SNR) ratio. According to the Shannon theorem,the upper limit of the number of bits per unit Hz that can betransmitted is log₂(1+SNR). Therefore, by measuring the received SNR atthe receiver end, one can determine the number of bits allocated foreach subchannel modulation. The total data throughput rate achieved bythe system, therefore, is simply the sum of all the data rates of allthe usable subchannels.

[0054] According to the T1E1.4 ADSL standards, data bits are grouped andprocessed every 250 μsec. The number of bits that can be processed overone such time frame is the summation of the bits allocated for eachsubchannel determined from the previous channel response measurement.For a given number of bits assigned to a certain subchannel, quadratureamplitude modulation (QAM is used to convert bits to a complex value,which is then modulated by the subchannel carrier at the correspondingfrequency.

[0055] The above is a merely a brief summary of the general operation ofa typical DMT/ADSL communications system. The general circuits used inprior art ADSL systems, the specifics of the bit/energy loading processfor the sub-channels, the bit fine tuning process, and the details ofthe modulation of the sub-channels, are well-known in the art, and willnot be discussed at length herein except where such structures orprocedures have been modified in accordance with the teachings herein.

[0056] The full downstream data throughput of a typical prior art ADSLstandard transceiver approaches 6 Mbps, which is more than 200 times thespeed of conventional analog modem technology. This requirement wasimposed since a large part of the initial motivation to implement ADSLwas to achieve high speed multimedia communications and videoteleconferencing. Nevertheless, a large number of potential users do notwant or need to have such wide bandwidth capability. For example, manypotential users of ADSL (or similar high speed loops), including manywho are intending to use such links primarily for Internet access, onlyneed to achieve downstream transmission speeds that are in the hundredsof kilobits per second range. This data rate is in fact achievable usingonly a fraction of the available bandwidth of ADSL. By processing only afraction of the available bandwidth of the ADSL standard, the presentinvention permits a limited but extremely useful ADSL modem to beimplemented with significantly less expense and complexity thanpreviously possible. At the same time, because the present invention hasmodular characteristics, the proposed implementation of the presentinvention affords users an easy path to forward and upward expansion ofthe overall functionality of their system.

[0057] The principle behind this aspect of the present invention is asfollows: As shown in FIG. 1B, if the transmission in the channel isrestricted to a smaller bandwidth by an anti-aliasing filter 80,according to the Nyquist sampling theorem, the sampling rate of AFEdevices (such as ADC 81) that perform analog to digital conversion canbe significantly reduced. Specifically, if the total downstreambandwidth is limited to some fractional total B Hz (in a preferredembodiment using DMT in an ADSL environment, B=20 DMT channels or about86 kHz) as shown below, we can limit the Nyquist sampling rate to around180 kHz. This is achievable with ADCs having greatly simplified hardwareand reduced performance requirements, in contrast to the full ADSLbandwidth approach, which processes 200 DMT channels or 900 kHz in thecase of fall ADSL implementation.

[0058] The total accumulated bit rate of an ADSL communications systemusing the present invention can be calculated as follows. Suppose atotal number of k subchannels (out of a total of M possible) are to besupported and each channel is allocated bk bits for transmission. Thetotal accumulated bit rate (R) is:

R=(Σ_(i=1,k) b ₁)*4 kHz (bits/sec)

[0059] where 4 kHz is the framing rate defined by T1E1.4 ADSL standards.If k=20 channels and the average number of bits per channel is 6, thentotal bit rate (R) is approximately 480 kbits/sec. It can be seen thatthis fractional use of the ADSL bandwidth nevertheless provides about 9times the performance of a conventional analog 56 kbits/sec digitalmodem.

[0060] The benefits of this approach of the present invention areapparent. The overall performance and cost of a high speedcommunications system can be scaled and controlled in directrelationship to the particular needs of particular users. In general,the data rate supportable by (and the relative cost of) any particularimplementation of the present invention is generally determined by twofactors: (1) the capacity of the AFE; and (2) the capacity of thehardware performing the DMT.

[0061] The capacity of an AFE is generally measured by the maximumsampling speed it can achieve. As explained above, the sampling speed inturn determines the upper limit of the frequency band B (in kHz) thatcan be obtained. At the defined channel separation of 4.3125 kHz forADSL, the total number of subchannels that can be supported is less thanor equal to B/4.1325. A suitable ADC can be selected, therefore, basedon the particular data rate and cost requirements of any particularuser.

[0062] The other factor that limits the number of subchannels (andachievable data rate) is the processing power available for DMTmodulation and demodulation routines. For example, a variety ofperformance levels (achievable data rates) are possible with well-knowndedicated signal processing hardware, such as digital signal processors,as discussed in more detail below with reference to FIG. 2.Alternatively, as shown in FIG. 3, if such routines are implementedprimarily by software and run by a host CPU, the required processingpower (MIPS) generally increases directly as function of the number ofsubchannels that need to be processed. This is because, in general, mostof the processings are done in serial, or a channel by channel basis. Asdiscussed below in more detail, the present invention makes use of a“calibration” routine for estimating the total available processingpower of a user's computing system in order to set an upper limit of thetotal subchannels that can be supported.

[0063] Irrespective of the selection of the particular AFE or signalprocessing technique used, however, another useful (but not essential)aspect of the present invention is that the sub-channels with thelargest signal to noise ratio (SNR) within the passband are selected fordata transmission. In other words, in the preferred embodiment of thepresent invention, those k subchannels within the passband that supportthe largest number of bits are used for processing. As seen in FIG. 1C,for example, a standard two-wire subscriber line typically has a SNRcurve that exhibits extensive attenuation with higher frequencies. Itcan be seen roughly in this figure that while there are more than 200sub-channels provided for downstream transmission in ADSL, it istypically the case that 50% of the maximum data rate can be accomplishedusing only a much smaller percentage (than 50%) of the sub-channels.This fact is especially useful in considering some of theshared/multi-channel bandwidth embodiments discussed further below.

[0064] The present invention, therefore, permits an implementation for ahigh speed data communications system that makes use of the best portionof the channel, while still being upwardly compatible and forwardexpandable. By these terms, it is meant that a system constructed inaccordance with the teachings herein is completely compatible with afully implemented version ADSL DMT modem. Moreover, it will be apparentto those skilled in the art that appropriate modifications specific tothe channel and data link protocols and standards can be made so thatthe present invention can be advantageously employed in non-ADSLenvironments as well. Upward compatibility and forward expandabilityrefer to the fact that systems constructed with the present teachingscan have data rates that are easily upgraded while still preserving andmaintaining compatibility with existing standards. For example, lowerend users desiring less bandwidth can achieve a satisfactory performancewith a minimum of cost, and can then upgrade the performance levels oftheir systems at later time by suitable (and preferably modular)upgrades of the AFE and signal processing hardware/software.

[0065] A system constructed in accordance with the present teachings iscompletely compatible with the full ADSL standard because of thefollowing two aspects: According to the rate adaptation featurespecified by the T1E1.4 ADSL standards, the bit rate for eachsub-channel is determined initially (and preferably dynamically on anongoing basis) by the sub-channel SNR analysis. Specifically, an ADSLdownstream receiver can inform an upstream ADSL transmitter about thequality of the transmission; the receiver can also decide the bit ratefor each sub-channel. Therefore, a downstream, partial-channel bandwidthreceiver using the present invention can (based on the speed andpassband of such receiver) supply an upstream, full-standard ADSLtransmitter with information or control signals to effectuate atransmission only in selected sub-channels. In particular, in apreferred embodiment, the upstream ADSL transmitter is provided with SNRinformation for sub-channels outside the passband that is artificiallycontrived so as to suggest to the upstream transmitter that thesesub-channels are not usable. In this manner, the downstream transmissionis limited to a certain number of subchannels within the AFE and signalprocessing capabilities of the receiver. It can be seen, nevertheless,that this scheme is completely transparent to the transmitter, therebypermitting a system built in accordance with the present teachings to befully compatible with the ADSL standard. While not possible at this timewithin the ADSL standard, it is apparent that other high-speed dataprotocols may use a control signal, instead, to provide for expresslimiting and control of the identity of the sub-channels transmittinginformation.

[0066] As the technology improves for AFE devices and DMTimplementation, the number of subchannels supported by a system usingthe present invention can increase. As a result, such systems canupgrade completely to a full T1E1.4 ADSL implementation using a singlehigher end modular replacement AFE devices, or alternatively, a numberof lower end modular AFE devices.

[0067] General Embodiment of Present Invention

[0068] The basic structure of the present invention is depictedgenerally in FIG. 2. In general, the present invention can be embodiedin different combinations of hardware and software. The primarydifference between these embodiments is the specific implementation ofthe DMT core. These specific embodiments are described in more detailbelow with reference to FIGS. 3A and 3B.

[0069] The structure and operation of ADSL transceivers is well-known inthe art, and for that reason the present description primarily detailsthose aspects of such transceivers which are necessary to anunderstanding of the inventions herein. As seen in FIG. 2, a channel 100is made of a regular copper wire “loop”, and each such loop may havediffering electrical properties, transmission lengths (sizes), varyingattenuation characteristics, and a number of impairments orinterferences. Splitter 210, a conventional and well-known circuit,separates a DMT signal occupying more than 200 sub-channels from a lowerend 4 kHz POTS analog signal. The latter can be used for simultaneousvoice or conventional analog modem. Hybrid circuit 220 is alsowell-known in the art, and consists primarily of conventionaltransformers and isolation circuitry used in a wide variety ofhigh-speed devices interfacing to standard telephone lines. A ringdetect logic circuit 290 can also be implemented using acceptedtechniques, to alert a Control Interface 295 to the existence of atransmission signal originating from an upstream transceiver (notshown).

[0070] The full bandwidth signal is either low passed or bandpasslimited to a frequency width B by suitable, well-known techniques as itpasses through bandpass Filter and Analog/Digital Converter 280, so thatonly a fraction of the signal in the frequency domain is passed on toBuffer and DMT Receive Core 260. Again, the only important considerationfor Subband Filter 280 is that it must constrain the bandwidth of theincoming signal to be ≦B, where the sampling rate of the Analog/DigitalConverter is ≧2B. This can be accomplished by using well-known filterdesigns. By suitable selection of circuitry for Filter and ADC 280, theoverall system cost and performance can be scaled accordingly. In apreferred embodiment, the signal passed through Filter and ADC 280occupies a spectrum between approximately 200 and 400 kHz. Thisselection is based primarily on an expected average performance of atypical two-wire line. It will be apparent to those skilled in the artthat different bandpass widths and regions may be more suitable oroptimal for other kinds of data links, or other kinds of multi-carriermodulation schemes.

[0071] Moreover, in some instances, while it is somewhat more expensiveto implement, an adaptive or tunable filter may be substituted, suchthat the target frequencies of the passband are adjustable uniquely foreach new data link. In such cases, the bandpass can be configured tocoincide with the sub-channels having the highest achievable SNR,including the subchannels that must be supported for protocol or othersystem overhead reasons. Also, in some applications, theanalog-to-digital conversion may be performed by a digital signalprocessor, or by the host computer and therefore, the sampling rate canbe dynamically controlled and matched to the bandpass target frequencyand frequency breadth. This feature, in turn, would assist dynamicscaling of the data throughput based on system computing power andoverhead requirements.

[0072] Furthermore, in this preferred embodiment, using a multi-carrierapproach implementation for ADSL, a pilot tone at 276 kHz must beallowed within the passband. It is apparent that other protocols mayrequire similar pilot tones, and the design of comparable filters toachieve the functionality of Filter and ADC 280 is well within theordinary skill of one in the art.

[0073] DMT Receiver Core 260 is generally responsible for monitoring andmeasuring the SNR of the sub-channels falling within the frequency rangepassed by FILTER and ADC 280, and for extracting the original datastream from the numerous sub-carriers. In a preferred embodiment,Control Interface 295 receives system configuration information from ahost 298. This information may contain such parameters as targetthroughput rate R, target error rate, target center frequencies F forFILTER and ADC 280, target frequency width B, etc. By evaluating the SNRand bit capacities of the sub-channels computed by DMI Receiver Core260, and taking into consideration the target data rate R, ControlInterface 295 can select a number k of sub-channels up to and includingthe total available number M of sub-channels to carry the data streamfrom the upstream transmitter (not shown). The number of sub-channelsthat can be used for carrying data is directly related to the bandpassfrequency B as described above. In a preferred embodiment, M=200+(ADSL)and Control Interface 295 will usually configure k=20.

[0074] For every sub-channel other than the selected k sub-channels, a“mask” or blackout control/feedback signal is generated and transmittedby DMT Tx Core 250, Buffer 260 and DAC 230 to the upstream transceiver.This ensures that any subsequent data transmissions by the upstreamtransceiver only use the selected k sub-channels. This feedbackinformation is provided, therefore, irrespective of the transmittingcapacity of the upstream transceiver, and even during times when thechannel 100 is capable of supporting more than k sub-channels. In thismanner, the present system is perceived by upstream transceiver to becompatible with protocols and performance characteristics of theupstream transceiver, because the upstream transmitter receives feedbackinformation indicating merely that the two systems are connected througha channel with substantial signal attenuation characteristics for datasignals outside the k sub-channels. Based on the inherent rateadaptiveness of ADSL and other similar protocols, the upstreamtransceiver will automatically train itself to use only the ksub-channels predetermined by the downstream transceiver. It should benoted that the DAC 230 and Buffer-240 in the front end transmittingcircuit preferably transmit any upstream data transmissions using asecond frequency bandwidth different from that of the downstream datatransmission. However, this is not necessary in systems usingecho-cancellation. Furthermore, in ADSL applications, the size of thisbandwidth is considerably smaller, and uses only L sub-channels, whereL<M. In other XDSL applications, L may be on the same order or largerthan M.

[0075] Again, while the ADSL standard fixes the data error rate to be10⁻⁷, it is conceivable that other applications of the present inventionmay tolerate a reduced error rate. For example, if maximum datathroughput is required (i.e., the margin is less constrained) then thelargest bit capacity sub-channels within B can be selected.Alternatively, if the system is error-performance driven and has morerelaxed throughput requirements, than the 20 subchannels with the bestmargin are selected. A suitable combination of sub-channels can beselected by one skilled in the art based on the particular systemrequirements which may vary from application to application. Moreover,Controller Interface 295 may optimize the desired sub-channel mixdynamically depending on the type of data transmitted in channel 100.For example, streaming audio or video, or pictorial graphics, mayrequire less integrity and error performance than other kinds of dataused by n applications programs running on host 298. The specifics ofthe structure, operations and techniques used by Controller Interface295 are not constrained by any requirements of the present invention,and can be implemented in various ways well-known to those skilled inthe art.

[0076] The operation of the remainder of the circuitry shown in FIG. 2is also relatively straightforward and not unlike a typicalmulti-carrier modulation system. Control Interface 295 ensures that DMTTransmit Core 250 performs bit and energy loading only for thosesub-carriers necessary to effectuate a selected host throughputrate/error rate combination. As with the circuitry used for Filter ADC280, the circuitry for performing the functions of DAC 230 can beimplemented in programmable form to allow for greater flexibility.

[0077] Finally, while not presently supported in ADSL protocols, it isnevertheless possible that the filter in block 280 can be eliminatedentitely in some applications when the sub-channel or downstreamtransmission frequencies can be configured through appropriatehandshaking or similar procedures. In other words, if the upstreamtransmitter can be configured to transmit using only a portion of thebandwidth available in the channel, the advantages of the presentinvention can still be realized, because the ADC portion of block 280can still be relatively less complex, since it will be processing at amuch slower sampling rate than that required for a full spectrumimplementation. Moreover, such an implementation would also yield thesame commensurate savings in the DMT processing core, and reducedquantization errors.

[0078] Some special features of the present invention include the factthat:

[0079] (i) unlike hardware architectures implementing a full T1E1.4 ADSLstandard, the present invention uses a filter in the front end. Asmentioned earlier, the use of this filter is to allow low speed samplingby the ADC. If suitable handshaking between the upstream and downstreamtranscievers can be effectuated to generate a reduced downtstreamtransmission, the filter can be eliminated.

[0080] (ii) standard ring detection logic is incorporated to supportexisting modem features;

[0081] (iii) DMT Rx core 260 is basically implemented the same way asspecified by T1E1.4, but with some important differences, specifically:

[0082] [a] due to subband filtering and lower speed sampling, thefrequency channels at the output of FFT (not shown) in the DMT Rx Corehave a frequency shift

[0083] [b] Since not all 256 subchannels are necessarily supported bythe DMT Rx Core 260, actual FFT implementation can be smaller, simplerand more cost-effective;

[0084] (iv) Control logic 295 permits the system to behave essentiallylike a conventional analog modem, and is used to support necessary setuptasks such as dialing and handshaking;

[0085] (v) The use of limited bandwidth from the downstream channelreduces the need for echo-cancellation circuitry, because there is lessneed for overlap between the upstream and downstream transmissions, andthis further reduces system complexity and cost;

[0086] (vi) Because a smaller portion of the spectrum is processed bythe present invention, the peak-to-peak deviation of the downstreamsignal is reduced, and this helps to minimize quantization errors.

[0087] Dedicated Hardware Based Embodiment

[0088]FIG. 3A illustrates an embodiment of the present invention thatcan be generally described as a dedicated hardware implementation. Forthe present discussion of FIG. 3A, it can be assumed that those circuitshaving like numbered references are the same and/or perform the samefunction as their counterpart in FIG. 2. For example, unless otherwiseindicated, there is no material difference between Splitter 210 (FIG. 2)and Splitter 310 (FIG. 3A).

[0089] In this embodiment, the DMT sub-channel modulation core isimplemented completely in dedicated processing hardware. For thisapplication, DMT Receiver Core 260 typically includes a digital signalprocessor ASP) (not shown) and including on-board program ROM (or othersuitable memory) for storing executable microcode routines forperforming bit, energy and SNR measurements of the carriers in thesub-channels. In such an embodiment, due to the power of the DSP, thereis typically no need for processing assistance from a user's hostprocessor 398. This embodiment therefore may be advantageously employedwhere host processing power limitations are a consideration.

[0090] A user of a system shown in FIG. 3A can expand the functionality(i.e., data throughput rate and modem features) of such system byupgrading the DMT Receiver Core 260, and where necessary, the AFE 280 aswell. The system of FIG. 3A can be incorporated on a typical printedcircuit board. By mounting or packaging the circuits used in such blocksin an accessible fashion, they can be replaced or supplemented much inthe same way present users of personal computers can upgrade theirmotherboards to include additional DRAM. One practical alternative, forexample, would be to have multiple available slots to accommodate newsubband pass filters for passing a greater portion of the downstreamtransmission to be processed by the DMT core logic. Other practical andsimple variations of this approach will be apparent to those skilled inthe art.

[0091] Partial Software Based Embodiment

[0092] In the above dedicated hardware embodiment, the overall speed(data throughput) can be maximized but with less flexibility forupgrades. This is because upgrades to such a system must take the formof hardware replacements, which can be more costly and difficult for theuser to incorporate. On the other hand, as depicted in FIG. 3B, a numberof important functions of a communications system can be completelyimplemented in software, in an analogous fashion to what is commonlydescribed in the art as a “software” modem. In this case, the overallspeed of the system depends on the user's processor power available athost 398, and only the AFE portion need be implemented in hardware.

[0093] The primary differences between the embodiments of FIG. 3A and 3Bare the following: (1) implementation of DMT modulation; (2)implementation of the control and handshaking functions; and (3)implementation of the control interface. As seen in FIG. 3B, DMT ReceiveCore 460 and DMT Transmit Core 450 are implemented in a data pump devicedriver by the host system 398. In a preferred embodiment, host system398 includes some form of multi-purpose microprocessor (such as an x86type processor) running a suitable operating system (such as Windows byMicrosoft), and is capable of executing suitable low level drivers forthe DMT modulation (FIG. 4), as well as high level application softwarefor implementing Control Interface 500 (FIG. 5). Host processor system398 communicates over a standard bus interface 385 (i.e., a PCI bus) toFront End circuitry 396 for implementing a high speed modem. As with thecircuitry in conventional analog modems, this circuitry of the presentinvention can be effectively incorporated on a PC motherboard (i.e., BusInterface 385 and Front End Circuitry 396 can be merged so that they areessentially part of host system 398) or on a separate printed circuitboard, or as a stand-alone unit physically separated from host 398.While this approach may not provide as much throughput performance, ithas the advantage of being less expensive than the pure hardwareapproach of FIG. 2, and much easier to upgrade.

[0094] In the “software” modem implementation of FIG. 3 using a typicalPC running Windows, the DMT Tx core 450, Rx Core 460 andControl/Handshaking logic are implemented as a Windows Data Pump DeviceDriver 400, which consist of DMT routines, associated control andhandshaking codes, and an interface to kernel 480.

[0095] A more detailed characterization of a portion of host processingsystem 398 is depicted in FIG. 4, which illustrates a preferredembodiment of a device driver 400 as it would be constituted for acomputer operating system shell 480. In the present embodiment,Microsoft Windows NT is considered, but it is understood that othercomparable environments may be used, including UNIX, Windows 95, etc. Asis well-known, operating system 480 is responsible for supervising andcontrolling the operation of processing system 398 and all of itsassociated peripheral devices. Operating system 480 also includesvarious interactive control and graphical application interfaces (FIG.5) for permitting a user of processing system 398 to run variousapplications programs, and to set up, control, configure, monitor andutilize peripheral devices such as disk drives, printers, monitors,modems and the like.

[0096] To assist operating system 480 to interact and control suchperipheral devices, it is also well-known to use device drivers, whichare essentially low-level hardware routines executed by a host processorand operating system. A device driver is a memory image file orexecutable file that contains all the code necessary to instruct a hostprocessor to interface and drive a particular device within a computingsystem. Device driver 400 acts as an interface between an operatingsystem 480 (in this case, Microsoft Windows NT) and hardware 396. Inthis case, for example, device driver 400 supports hardware 396 (seeFIG. 3B), which is embodied in a typical printed circuit board (orexternal device). The teachings herein therefore provide for a newdevice driver that in combination with hardware 396 operates as a“software” modem. In this manner, operating system 480 classifies thiscombination as an ADSL modem, or in other words, another typicalpersonal computer peripheral device, analogous to conventionalvoice-band modems.

[0097] Generally speaking, device driver 400 works as follows: a user ofprocessing system 398 desiring to establish a data link to a remote sitefor transmitting/receiving data initiates such link through anapplication program (FIG. 5). Operating system 480 (FIG. 4) interpretsand services this request by passing control of this task to devicedriver 400, which first generates appropriate instructions for a DeviceInitialization 440. In a preferred embodiment, Modem card 396 isinitialized through Bus Interface 410 using conventional voice bandmodem control commands, so that the present invention is compatible withpreexisting applications programs written for controlling modems usingoperating system 480. Similarly, therefore, control and data signals areinterpreted and transmitted by operating system 480 to a Serial PortInterface 475 so that conventional modem dialing instructions andhandshaking signals can be imparted to Modem Card 396 to establish alink through channel 100 to an upstream conventional ADSL transciever(not shown). As explained above, after suitable handshaking protocolshave been completed, the upstream fully compatible ADSL transceiver willbegin transmitting data on all available M usable sub-channels. Thisdownstream data is filtered by FILTER/ADC 380 and at this time,information for only N sub-channels (N<=M) is temporarily held in Buffer370. At or before this same time, an interrupt is generated by businterface 385 and passed through device driver bus interface 410 toalert Interrupt Service Router 415 to the existence of downstream datarequiting processing. Thereafter, DMT Receive Core 460 begins processingthe downstream data stream in response to control information from ISR415. A demultiplexer 465 extracts and correlates the data in the varioussub-channels before passing it on to Serial Port Interface 470, and backto Operating System 480. In this manner, Device Driver 400 coordinateswith Modem card 396 to effectuate a software modem whose performance isdirectly correlated to the computing power of a processor containedwithin the host processing device.

[0098] As mentioned earlier, Device Driver 400 also contains controlinformation for configuring the number and selection of sub-channels tobe used in the particular data link established through channel 100 withthe upstream transciever during an initialization process. As alsomentioned above, this control information may be self-determined by auser of host processing system 398, or alternatively, automaticallysensed and monitored by such processing system, based on a computingperformance rating for such system determined in a calibration routine.In either event, during the initialization process (and at all timessubsequent) the upstream transceiver is induced to use such sub-channelsonly for the ensuing data transmission. This is accomplished bytransmitting SNR information that is interpreted by the upstreamtransceiver as zero for all but K≦N of the sub-channels of the driverselection. This data is passed under control of Operating System 480through Serial Port 475, Framing control 455 and DMT Transmit Core 450before being sent out to Modem Card 396 and channel 100.

[0099] It is understood, of course, that ADSL Modem 396 can also respondto a request from a remote modem for initiating the data link. Theprocess for initializing the link, nevertheless, is essentially the sameas that described above. Device driver 400 can also contain controllogic for supporting typical dial-up modem operations and control codesfrom conventional modem application programs typically implemented invoice-band modems, such as setting up Originate/Answer modes, monitoringcall progress, performing modem diagnostics, configuringreceive/transmit buffer sizes, supporting facsimile transmissions, aswell as performing enhanced error control, data compression and flowcontrol between Modem Card 396 and Operating System 480. Device Driver400 can also support other conventional “always-on” data linkconnections as desired, such as may be found in typical ethernet networkconnections, and other dedicated applications.

[0100] Given the teachings of the present invention, the general designof the above Data Pump Device Driver 400 is a routine task well withinthe abilities of one skilled in the art. The specifics of suchimplementation are not critical or essential to the present inventions,and will vary from application to application according to systemdesigner requirements, so they are not included here. Again, while thisembodiment of the present invention is set out in the context of a PCbased host processor running Windows, it win be apparent to thoseskilled in the art that above description is merely an exemplaryimplementation. The referenced DMT routines, associated control andhandshaking codes can be employed in numerous host processing/operatingsystem environments, and in a variety of different coding organizations(high level or low level processing forms) well-known in the art.

[0101] In the preferred embodiment implemented using a standard PCrunning Windows, Control/Application interface 500 includes Win32 codeswhich provide standard modem utility functions and interface with DataPump Device Driver 400. In FIG. 5, a flowchart of the operation of theControl/Application Interface 500 can be seen, which interface isdiscussed in more detail below.

[0102] Another particularly beneficial aspect of the embodiment of FIG.3B is the provision of a self-determining “performance” or calibrationrating that can be used to determine an optimal or maximum datathroughput rate. In other words, the system of FIG. 3B can automaticallyand adaptively configure a host system 398 to a particular throughputrate based on an evaluation of the available computing power. In apreferred embodiment, the performance rating is determined based on acalibration routine executed by Data Pump Device Driver 400. Thisroutine sets a timer, and counts how many DMT frames can be processedwithin the given time; this gives a relative figure of merit for theparticular host system in question. For each sub-channel to be added,one DMT frame needs to be processed within a small fraction of 250 μs.Therefore, by incrementally increasing the sub-channel count, theoverall effect on total system processing overhead can be determined.Control/Application Interface 500 provides the user with control to seta threshold of available host power for implementing the high speedlink. Based on this threshold of available power (which can be nominallyset to 20%) the number of subchannels that can be supported can begleaned very quickly.

[0103] In view of current technology, when DMT processing is implementedin software, the host processing power is more likely to be the limitingfactor than the frequency band of the subband filter 80 in FIG. 1B.Nevertheless, because host processors (and especially microprocessors)are evolving in performance at a fairly rapid rate, the presentinvention affords users an opportunity to realize a high speed data linkwith performance that is controllable, and which improves whenever thereis an upgrade in the host processing system. Since many typical presentday personal computer systems have easily accessible and replaceablehost processors, users of the present invention can easily and flexiblyexpand and enhance the throughput and functionality of an ADSL modem.

[0104] An example of the flow chart for an ADSL modemapplication/control program 500 designed in accordance with the presentteachings is shown in FIG. 5. With the teachings herein, a user of hostprocessing system 398 can, for the first time, dynamically control aforward compatible and expandable modem, such as an ADSL modem, usingmodem-control applications software that is analogous to that onlypreviously available for voice band modems. In a preferred embodiment,ADSL Modem Card 396 is automatically detected by Operating System 480and set up by initialization routine 505 by Modem Device Driver 400. Aseparate detection routine 510 determines whether or not ADSL Modem Card396 has been upgraded with an additional AFE (as described generallywith reference to FIG. 6 below), or alternatively whether a processorused in a host system has changed. The purpose of this step is primarilyto determine whether entries in a Device Parameters Table 560 need to beupdated because of changes in computing power, front end capabilities orother parameters that may necessitate a modification of the datathroughput characterization of the overall system when used in acommunications mode.

[0105] A calibration routine 520 is then executed to determine thenominal setup parameters for the overall system in the manner describedearlier. The results from this operation are stored in Device ParamaterTable 560 where they then become accessible to various applicationprograms that may make use of ADSL Modem Card 396 and Device Driver 400.The information stored in table 560 can include any or all of thefollowing: (a) measurements of the computing power available to the hostprocessor; (b) measurements of the number of frames processable by thesystem within a particular time period; (c) estimations of the expectedloading on the processing system based on demands of other applicationsprograms and peripheral devices; (d) minimum and maximum data throughputestimations and/or targets; (e) data identifying the type of hostprocessor; (f) data identifying the number and type of AFEs in ADSLModem card 396; (g) estimations and/or target system loading ratesavailable for a datalink (i.e., maximum available processing time to beused by the system during data transmission); (h) data transmit andreceive buffer sizes; (i) interrupt or similar priority data for themodem card; (j) estimations and/or target system sub-channelutilization; (k) estimations and/or target system sub-channel bitcapacity information; etc. It will be apparent to skilled artisans thatthe above are just examples of the types of information that may bepertinent to the performance of a high speed communications system, andthat other parameters may be considered depending on the environment,application, etc. in which the present invention is used.

[0106] After performing Auto Calibration routine 520, the results of thesame are presented to the user for acceptance and verification at step525. At this point, the user can accept the predetermined configurationdata at step 526 (i.e., such as proposed maximum and minimum throughputrates, loading rates, etc.) and this would otherwise invoke an end ofmodem setup routine 590. Should the user not want to accept therecommended parameters, a Manual Configuration routine 530 is executed.At this juncture, various system performance data can be presented tothe user for review, along with a list of modifiable system options 532.If for example, the user elects to increase the desired throughput rate,a Verification routine 540 is then executed to determine whether suchrate is reasonably sustainable within the other parameters of thesystem. If the new proposed configuration data is otherwise acceptable,then the Device Parameter Table 560 is updated, and the setup routineagain ends. Otherwise, the user is alerted by a Notification/Suggestionroutine 550, which points out the failure of the proposed configuration,and, if possible, makes suggestions to the user for modifying the systemoptions 532 so that overall compliance can be achieved within theperformance capability of the host processing system. The program thenloops back to Acceptance routine 525, and thereafter the process isrepeated until an acceptable configuration has been achieved, and anychanges have been incorporated into Device Parameter Table 560.

[0107] While some of the operational steps above are described asimplemented solely by Operating system 480 and Device Driver 400, it isunderstood that such operations occur under direction of modemapplications program 500, or in some cases, based on initializationroutines executed by the host processing system. Moreover, to simplifythe presentation of the present invention, only some of the featuresthat may be implemented are described above, and many other well-knownoperational steps normally associated with setting up or monitoringmodems are omitted.

[0108] As with the design of the above Data Pump Device Driver 400, thegeneral design of the Control/Application Interface 500 required toaccomplish the above functions is a routine task well within theabilities of one skilled in the art given the teachings herein. Thespecifics of such implementation are not critical or essential to thepresent inventions, and will vary from application to applicationaccording to system designer requirements, so they are not includedhere. Again, while this embodiment of the present invention is set outin the context of a PC based host processor running Windows, it will beapparent to those skilled in the art that above description is merely anexemplary implementation. The referenced Control/Application Interfacecan be employed in numerous host processing/operating systemenvironments, and in a variety of different coding organizations (highlevel or low level processing forms) well-known in the art.

[0109] Multiple AFE and Lower Sampling Speed Embodiment

[0110]FIG. 6 illustrates an example of the present invention wherein auser can achieve significantly increased data throughput using multiplelow cost, low sampling speed AFEs, generally designated 680A, 680B,680C, etc. As described above, these AFEs may be in separate, modularform and configured in a bank form so that they can be incorporatedconveniently on a printed circuit board (or similar mounting) orintegrated in a single IC chip. Each AFE can be implemented in a fixedhardware configuration, or individually programmed/controlled to pass acertain portion of the downstream data transmission. Assuming suitableprocessing power is available for DMT modulation/demodulation (eitherthrough a dedicated or software implementation as described above inconnection with FIGS. 3A and 3B) a user of such system can achievesubstantially expanded functionality by upgrades having performancecharacteristics and costs of their choice.

[0111] Underlying Theory of Present Invention for ADSL/DMT Applications

[0112] A discussion of the underlying theory supporting the premise ofthe present invention now follows. In particular, this section shows themathematical foundation for the use of multiple low speed AFE's tosample a full bandwidth ADSL/DMT signal. It will be apparent to thoseskilled in the art, after reading this discussion, that the presentinventions can be advantageously used in a number of rate adaptablecommunications environments, including CAP implementations of ADSL.

[0113] DMT Transmitter

[0114] To simplify the present discussion, only a subset of the DMTtransmitter is considered, as shown in FIGS. 1D and 1E. The combinedmodel that includes the channel response and the DMT receiver is shownbelow, where only one branch of band-pass filtering and sampling isshown for simplicity. To further simplify, the channel response and theSFIR are combined together.

[0115] In this subsection, we analyze the signal over one band passfiltering process. The result shows that the DMT signals within the bandpass can be recovered with the same use of impulse response shorteningtechnique. With use of multiple AFE's that cover different frequencybands, all DMT subchannels can be recovered.

[0116] IFFT

[0117] In an ADSL environment as shown in FIG. 1D, N (N=512) frequencydomain variables are transformed into the time domain by IFFT block 60$y_{n} = {\sum\limits_{i = 0}^{N - 1}{x_{n}^{j\quad 2\pi \quad {{in}/N}}}}$

[0118] Cyclic Prefix

[0119] c time domain variables at the end are added to the prefix of thesequence as shown in FIG. 1D by block 70 {Z_(n)}={Z_(−c), Z_(−c+1), . .. , Z⁻¹, Z₀, Z₁, . . . , Z_(N−1)}={y_(N−c), . . . , y_(N−1), y₀, . . . ,y_(N−1)}

[0120] AFE/DAC

[0121] Discrete time domain sequence are converted by AFE 75 to thecontinuous time domain waveform as follows:${{z(t)} = {\sum\limits_{n = {- \infty}}^{\infty}{z_{n}{p_{TX}\left( {t - {nT}_{c}} \right)}}}},$

[0122] where p_(TX)(t) is the transmitter pulse of the AFE/DAC used, andT_(c) is the transmitter DAC clock period and equal to$T_{c} = \frac{250\quad \mu \quad \sec}{N + c}$

[0123] according to the DMT ADSL specifications.

[0124] Channel

[0125] With reference now to FIG. 1E, if the channel impulse response ish_(c)(t), we have${u(t)} = {\sum\limits_{n = {- \infty}}^{\infty}{z_{n}{p_{RX}\left( {t - {nT}_{c}} \right)}}}$

[0126] where P_(RX)(t)=P_(TX)(t){circumflex over (x)}h_(c)(t).

[0127] Bandpass Filtering

[0128] If the band pass filter 80 has an impulse response of h_(BPF)(t),_(v(t)=)$\sum\limits_{n = {- \infty}}^{\infty}{z_{n}{p_{BPF}\left( {t - {nT}_{c}} \right)}}$

[0129] where P_(BPF)(t)=P_(RX)(t) {circumflex over (x)}h_(BPF)(t).

[0130] AFE/ADC

[0131] Let the sampling dock be T_(s)=T_(c)×L. This means a slowersampling by a factor of L for AFE 81. Thus,$w_{k} = {{\sum\limits_{n = {- \infty}}^{\infty}{z_{n}{p_{BPF}\left( {{kT}_{s} - {nT}_{c}} \right)}}} = {\sum\limits_{n = {- \infty}}^{\infty}{z_{n}{p_{BPF}\left( {\left\lbrack {{kL} - n} \right\rbrack T_{c}} \right)}}}}$

[0132] For causal pulse P_(BPF)(t), we have$w_{k} = {{\sum\limits_{n = {- \infty}}^{\infty}{z_{n}{p_{BPF}\left( {\left( {{kL} - n} \right)T_{c}} \right)}}} = {\sum\limits_{n = 0}^{\infty}{z_{{kL} - n}{p_{BPF}\left( {nT}_{c} \right)}}}}$

[0133] Shortening FIR (SFIR)

[0134] After AFE discrete time sampling, a time domain equalizer (TEQ)called SFIR 82 is used to reduce the combined discrete time impulseresponse to a duration smaller than c. If the SFIR response ish_(SFIR)[n], we have $\begin{matrix}{r_{k} = {\sum\limits_{i = 0}^{\infty}{w_{k - i}{h_{SFIR}\lbrack i\rbrack}}}} \\{= {\sum\limits_{i = 0}^{\infty}{\left\lbrack {\sum\limits_{n = {- \infty}}^{\infty}{z_{n}{p_{BPF}\left( {\left\lbrack {{kL} - n - {IL}} \right)T_{c}} \right)}}} \right\rbrack {h_{SFIR}\lbrack i\rbrack}}}} \\{= {\sum\limits_{n = {- \infty}}^{\infty}{z_{n}{h_{tot}\quad\left\lbrack {{kL} - n} \right\rbrack}}}} \\{= {\sum\limits_{n = 0}^{\infty}{z_{{kL} - n}{h_{tot}\lbrack n\rbrack}}}}\end{matrix}$ where${h_{tot}\left\lbrack {{kL} - n} \right\rbrack} = {\sum\limits_{i = 0}^{\infty}{{h_{SFIR}\lbrack i\rbrack}{p_{BPF}\left( {\left\lbrack {{kL} - n - {iL}} \right\rbrack T_{c}} \right)}}}$

[0135] Physical Meaning of h_(tot)[n]

[0136] If we perform discrete Fourier transform at block 84 forh_(tot)[n], we obtain H_(tot)[ω]=H_(SFI)[Lω]H_(BPF)[ω] whereH_(SFIR)[Lω] and H_(BPF)[ω] are the DFT's with period 1/(LT_(c)) and1/T_(c), respectively. Their spectra can be illustrated as shown in FIG.1F for L=5.

[0137] Dropping Cyclic Prefix

[0138] By dropping the cyclic prefix of length c/L, at block 83 weconsider only s_(k)=r_(k), k=0, . . . , N₁−1, where N₁=N/L.

[0139] FFT

[0140] Performing FFT at block 84 for s_(k), k=0, . . . , (N/L)−1, oneobtains: $\begin{matrix}{q_{n} = {\sum\limits_{l = 0}^{N_{1} - 1}{s_{l}^{{- j}\quad 2\pi \quad {{nl}/N_{1}}}}}} \\{= {\sum\limits_{k = 0}^{N_{1} - 1}{r_{k}^{{- j}\quad 2\quad \pi \quad {{nk}/N_{1}}}}}} \\{= {\sum\limits_{k = 0}^{N_{1} - 1}{\left( {\sum\limits_{i = 0}^{\infty}{z_{{kL} - i}{h_{tot}\lbrack i\rbrack}}} \right)^{{- {j2}}\quad \pi \quad {{nk}/N_{1}}}}}} \\{= {\sum\limits_{k = 0}^{N_{1} - 1}{\sum\limits_{i = 0}^{\infty}{z_{{kL} - i}{h_{tot}\lbrack i\rbrack}^{{- j}\quad 2\pi \quad {{n{({{kL} - i})}}/N_{1}}}^{{- {j2}}\quad \pi \quad {{ni}/N_{1}}}}}}} \\{= {\sum\limits_{i = 0}^{\infty}{\sum\limits_{k = 0}^{N_{1} - 1}{z_{{kL} - i}^{{- j}\quad 2\quad \pi \quad {{n{({{kL} - i})}}/N_{1}}}{h_{tot}\lbrack i\rbrack}^{{- j}\quad 2\quad \pi \quad {{ni}/N_{1}}}}}}} \\{= {\sum\limits_{i = 0}^{c}{\sum\limits_{k = 0}^{N_{1} - 1}{z_{{kL} - i}^{{- j}\quad 2\quad \pi \quad {{n{({{kL} - i})}}/N_{1}}}{h_{tot}\lbrack i\rbrack}^{{- j}\quad 2\pi \quad {{ni}/N_{1}}}}}}} \\{= {\sum\limits_{i = 0}^{c}{\sum\limits_{k = 0}^{N_{1} - 1}{y_{{kL} - i}^{{- j}\quad 2\quad \pi \quad {{n{({{kL} - i})}}/N_{1}}}{h_{tot}\lbrack i\rbrack}{\quad}^{{- j}\quad 2\quad \pi \quad {i/N_{1}}}}}}}\end{matrix}$

[0141] where we assume h_(tot)[i] is only nonzero for i=0, . . . , c.For a given i, let us define l′=[i/L];

[0142] We can then define i′=l′L−i, where i′=0, . . . , L−1. Therefore,i=l′L−i′

[0143] From the above definitions, we have $\begin{matrix}{{\sum\limits_{k = 0}^{N_{1} - 1}{y_{{kL} - i}^{{- j}\quad 2\quad \pi \quad {{n{({{kL} - i})}}/N_{1}}}}} = \quad {{\sum\limits_{k = 0}^{l^{\prime} - 1}{y_{{kL} - i}^{{- j}\quad 2\quad \pi \quad {{n{({{kL} - i})}}/N_{1}}}}} +}} \\{\quad {\sum\limits_{k = l^{\prime}}^{N_{1} - 1}{y_{{kL} - i}^{{- j}\quad 2\quad \pi \quad {{n{({{kL} - i})}}/N_{1}}}}}} \\{= \quad {{\sum\limits_{k = 0}^{l^{\prime} - 1}{y_{{{({k - l^{\prime}})}L} + i^{\prime}}^{{- j}\quad 2\pi \quad {{n{({{{\lbrack{k - l^{\prime}}\rbrack}L} + i^{\prime}})}}/N_{1}}}}} +}} \\{\quad {\sum\limits_{k = l^{\prime}}^{N_{1} - 1}{y_{{{({k - l^{\prime}})}L} + i^{\prime}}^{{- j}\quad 2\quad \pi \quad {{n{({{{\lbrack{k - l^{\prime}}\rbrack}L} + i^{\prime}})}}/N_{1}}}}}} \\{= \quad {{\sum\limits_{k = 0}^{l^{\prime} - 1}{y_{{{({k - l^{\prime} + N_{1}})}L} + i^{\prime}}^{{- j}\quad 2\pi \quad {{n{({{{\lbrack{k - l^{\prime} + N_{1}}\rbrack}L} + i^{\prime}})}}/N_{1}}}}} +}} \\{\quad {\sum\limits_{k = 0}^{N_{1} - 1 - l^{\prime}}{y_{{kL} + i^{\prime}}^{{- j}\quad 2\pi \quad {{n{({{kL} + i^{\prime}})}}/N_{1}}}}}} \\{= \quad {{\sum\limits_{k = {N_{1} - l^{\prime}}}^{N_{1} - 1}{y_{{kL} + i^{\prime}}^{{- j}\quad 2\pi \quad {{n{({{kL} + i^{\prime}})}}/N_{1}}}}} +}} \\{\quad {\sum\limits_{k = 0}^{N_{1} - 1 - l^{\prime}}{y_{{kL} + i^{\prime}}^{{- j}\quad 2\pi \quad {{n{({{kL} + i^{\prime}})}}/N_{1}}}}}} \\{= \quad {\sum\limits_{k = 0}^{N_{1} - 1}{y_{{kL} + i^{\prime}}^{{- j}\quad 2\pi \quad {{n{({{kL} + i^{\prime}})}}/N_{1}}}}}}\end{matrix}$

[0144] Therefore, $\begin{matrix}{q_{n} = {\sum\limits_{i = 0}^{c}{\sum\limits_{k = 0}^{N_{1} - 1}{y_{{kL} - i}^{{- j}\quad 2{{{\pi n}{({{kL} - i})}}/N_{1}}}{h_{tot}\lbrack i\rbrack}^{{- {j2\pi}}\quad {{ni}/N_{1}}}}}}} \\{= {\sum\limits_{i = 0}^{c}{\left\lbrack {\sum\limits_{k = 0}^{N_{1} - 1}{y_{{kL} + i^{\prime}}^{{- {j2\pi}}\quad {{n{({{kL} + i^{\prime}})}}/N_{1}}}}} \right\rbrack {h_{tot}\lbrack i\rbrack}^{{- j}\quad 2\pi \quad {{ni}/N_{1}}}}}} \\{= {\sum\limits_{i = 0}^{c}{\left\lbrack {\sum\limits_{k = 0}^{N_{1} - 1}{\left( {\sum\limits_{l = 0}^{N - 1}{x_{l}^{j\quad 2{\pi {({{kL} + i^{\prime}})}}{l/N}}}} \right)^{{- {j2\pi}}\quad {{n{({{kL} + i^{\prime}})}}/N_{1}}}}} \right\rbrack {h_{tot}\lbrack i\rbrack}^{{- j}\quad 2\pi \quad {{ni}/N_{1}}}}}} \\{= {\sum\limits_{i = 0}^{c}{\left\lbrack {\sum\limits_{k = 0}^{N_{1} - 1}{\sum\limits_{l = 0}^{N - 1}{x_{l}^{j\quad 2\pi \quad {({{kL} + i^{\prime}})}\quad {{({l - n})}/N}}}}} \right\rbrack {h_{tot}\lbrack i\rbrack}^{{- j}\quad 2\pi \quad {{ni}/N_{1}}}}}} \\{= {\sum\limits_{i = 0}^{c}{\left\lbrack {\sum\limits_{l = 0}^{N - 1}{x_{l}{\sum\limits_{k = 0}^{N - 1}^{j\quad 2\pi \quad {({{kL} + i^{\prime}})}\quad {{({l - n})}/N}}}}} \right\rbrack {h_{tot}\lbrack i\rbrack}^{{- j}\quad 2\pi \quad {{ni}/N_{1}}}}}}\end{matrix}$

[0145] Since${{\sum\limits_{k = 0}^{N_{1} - 1}^{{j2\pi}\quad {({{kL} + i^{\prime}})}\quad {{({l - n})}/N}}} = {{0\quad {when}\quad \left( {l - n} \right)} \neq {nM}_{1}}},{{we}\quad {have}}$$q_{n} = {N_{1}{\sum\limits_{i = 0}^{c}{\left\lbrack {\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}^{j\quad 2\pi \quad i^{\prime}{m/L}}}} \right\rbrack {h_{tot}\lbrack i\rbrack}^{{- j}\quad {w2}\quad \pi \quad {{ni}/N_{1}}}}}}$

[0146] Knowing that h_(tot)[i] is zero for i<0 and i>c, we have$\begin{matrix}{q_{n} = {N_{1}{\sum\limits_{i = 0}^{c}{\left\lbrack {\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}^{j\quad 2\pi \quad i^{\prime}{m/L}}}} \right\rbrack {h_{tot}\lbrack i\rbrack}^{j\quad 2\pi \quad {i/N_{1}}}}}}} \\{= {N_{1}{\sum\limits_{i = {- \infty}}^{\infty}{\left\lbrack {\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}^{j\quad 2\pi \quad i^{\prime}{m/L}}}} \right\rbrack {h_{tot}\lbrack i\rbrack}^{{- j}\quad 2\pi \quad {{ni}/N_{1}}}}}}} \\{= {N_{1}{\sum\limits_{l = {- \infty}}^{\infty}{\sum\limits_{i^{\prime} = 0}^{L - 1}{\left\lbrack {\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}^{j\quad 2\pi \quad i^{\prime}{m/L}}}} \right\rbrack {h_{tot}\left\lbrack {{lL} - i^{\prime}} \right\rbrack}^{{- j}\quad 2\pi \quad {{n{({{lL} - i^{\prime}})}}/N}}}}}}} \\{= {N_{1}{\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}{\sum\limits_{i^{\prime} = 0}^{L - 1}{^{j\quad 2\quad \pi \quad i^{\prime}{m/L}}{\sum\limits_{l = {- \infty}}^{\infty}{{h_{tot}\left\lbrack {{lL} - i^{\prime}} \right\rbrack}^{{- j}\quad 2\pi \quad {{n{({{lL} - i^{\prime}})}}/N}}}}}}}}}}\end{matrix}$

[0147] Since $\begin{matrix}{{{\sum\limits_{l = {- \infty}}^{\infty}{{h_{tot}\left\lbrack {{lL} - i^{\prime}} \right\rbrack}^{{- j}\quad 2\pi \quad n\quad {{({{lL} - i^{\prime}})}/N}}}} = {\sum\limits_{l = {- \infty}}^{\infty}{{h_{tot}\left\lbrack {{lL} - i^{\prime}} \right\rbrack}^{{- j}\quad \omega \quad {({{lL} - i^{\prime}})}T_{c}}}}}}_{\omega = {2\pi \quad {n/{NT}_{c}}}} \\{{= {F\left\{ {{h_{tot}(t)}{\sum\limits_{l}{\delta \left( {t - {\left\lbrack {{lL} - i^{\prime}} \right\rbrack T_{c}}} \right)}}} \right\}}}}_{\omega = {2\pi \quad {n/{Nt}_{c}}}} \\{{= {\frac{1}{2\pi}{{C_{tot}(\omega)} \otimes \left\lbrack {\frac{2\pi}{{LT}_{c}}{\sum\limits_{l}{{\delta \left( {\omega - \frac{2\pi \quad l}{{LT}_{c}}} \right)}^{j\quad 2\pi \quad {{li}^{\prime}/L}}}}} \right\rbrack}}}}_{\omega = {2\pi \quad {n/{NT}_{c}}}} \\{= {\frac{1}{{LT}_{c}}{\sum\limits_{l}{{C_{tot}\left( {\frac{2\pi \quad n}{{NT}_{c}} - \frac{2\pi \quad l}{{LT}_{c}}} \right)}^{j\quad 2\quad \pi \quad {{li}^{\prime}/L}}}}}}\end{matrix}$

[0148] we have $\begin{matrix}{q_{n} = {N_{1}{\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}{\sum\limits_{i^{\prime} = 0}^{L - 1}{^{j\quad 2\quad \pi \quad i^{\prime}{m/L}}{\sum\limits_{l = {- \infty}}^{\infty}{{h_{tot}\left\lbrack {{lL} - i^{\prime}} \right\rbrack}^{{- j}\quad 2\quad \pi \quad {{n{({{lL} - i^{\prime}})}}/N}}}}}}}}}} \\{= {N_{1}{\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}{\sum\limits_{i^{\prime} = 0}^{L - 1}{^{j\quad 2\quad \pi \quad i^{\prime}{m/L}}\frac{1}{{LT}_{c}}{\sum\limits_{l}{{H_{tot}\left( {\frac{2\pi \quad n}{{NT}_{c}} - \frac{2\pi \quad l}{{LT}_{c}}} \right)}^{j\quad 2\pi \quad l\quad {i^{\prime}/L}}}}}}}}}} \\{= {\frac{N_{1}}{{LT}_{c}}{\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}{\sum\limits_{l}{{H_{tot}\left( {\frac{2\pi \quad n}{{NT}_{c}} - \frac{2\pi \quad l}{{LT}_{c}}} \right)}{\sum\limits_{i^{\prime} = 0}^{L - 1}^{j\quad 2\pi \quad {({l + m})}{i^{\prime}/L}}}}}}}}} \\{= {\frac{N_{1}}{T_{c}}{\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}{H_{tot}\left( {\frac{2\pi \quad n}{{NT}_{c}} + \frac{2\pi \quad m}{{LT}_{c}}} \right)}}}}} \\{{= {\frac{N_{1}}{T_{c}}{\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}{H_{tot}\left( {\frac{2\pi}{{NT}_{c}}\left\lbrack {{mN}_{1} + n} \right)} \right\rbrack}}}}},{n = 0},\ldots \quad,{N_{1} - 1}} \\{{= {N_{1}{\sum\limits_{m = 0}^{L - 1}{x_{{mN}_{1} + n}{H_{tot}\left\lbrack {{mN}_{1} + n} \right\rbrack}}}}},{n = 0},\ldots \quad,{N_{1} - 1}}\end{matrix}$

[0149] where${{H_{tot}\lbrack n\rbrack} = {\frac{1}{T_{c}}{H_{tot}\left( {\frac{2\pi}{{NT}_{c}}n} \right)}}},{{{for}\quad 0} \leq n \leq N}$

[0150] Relationship between q_(n) and x_(n)

[0151] As shown in FIG. 1G if {overscore (H)}_(tot)[n] is a bandpassfilter and nonzero only in the intervals [k(N/2L), (k+1)(N/2L)] and[(2L−k−1)(N/2L), (2L−k)(N/2L)], where 0≦k<L, the possible values of mthat H_(tot)[m(N/L)+n] is nonzero for 0≦n<(N/L) are as follows.

[0152] Even k

[0153] If k is even, we can have m=k/2 and 0≦n<(N/2L) so thatH_(tot)[m(N/L)+n] is nonzero over the interval [k(N/2L), (k+1)(N/2L],and m=(L−1)−k/2 and (N/2L)≦n<(N/L) so that H_(tot)[m(N/L)+n] is nonzeroover the interval [(2L−k−1)(N/2L), (2L−k)(N/2L)].

[0154] Odd k

[0155] If k is odd, we can have m=(k−1)/2 and (N/2L)≦n<(N/L) so thatH_(tot)[m(N/L)+n] is nonzero over the interval [k(N/2L),(k+1)(N/2L)],and m=L−(k−1)/2 and 0≦n<(N/2L) so that H_(tot)[m(N/L)+n] isnonzero over the interval [(2L−k−1)(N/2L), (2L−k)(N/2L)].

[0156] The above discussion is illustrated in FIG. 1G for L=3.

[0157] In another variation that can be used in the present invention,similar advantages to those obtained by limiting bandwidth in thereceived signal in the downstream transceiver can be obtained by alsooptionally limiting the upstream data rate of the transceiver as well.In other words, the ADSL standard provides for 31 channels in theupstream direction, but many applications do not require this amount ofbandwidth. The constraints, requirements and costs associated with theDMT modulation signal processing, and DAC 330 also can be significantlyreduced by transmitting only a sub-set of the available 31 sub-channels.The determination of the appropriate sub-channels would be accomplishedin essentially the same manner as set forth above, except that theinformation on upstream sub-channel SNR usually must be determined bythe upstream transceiver, and then fed back to the downstreamtransceiver. To save time and overhead complexity, and given the factthat there is less variation in bit capacity in sub-channels in thisfrequency band, one approach also would be to simply select a fixedsub-set of such sub-channels without regard to their actual performancecharacteristics. In a software modem environment, Control/Applicationsoftware 500 would provide a user with selectable control to effectuatea restricted upstream transmission on limited sub-channels. Again, withrespect to the ADSL standard, the only requirement in this respect isthat the upstream pilot tone must also be transmitted to establish avalid data link. An optional limited “upstream” transmission can beeffectuated in a variety of ways by the circuitry already describedabove in connection with FIGS. 2 and 3. The exact details of suchimplementation will be apparent to those of skill in the art given thepresent teachings.

[0158] Although the present invention has been described in terms of apreferred ADSL embodiment, it will be apparent to those skilled in theart that many alterations and modifications may be made to suchembodiments without departing from the teachings of the presentinvention. For example, it is apparent that the present invention wouldbe beneficial used in any XDSL or high speed multi-carrier applicationenvironment. Other types of VLSI and ULSI components beyond thoseillustrated in the foregoing detailed description can be used suitablywith the present invention. Accordingly, it is intended that the allsuch alterations and modifications be included within the scope andspirit of the invention as defined by the following claims.

What is claimed is:
 1. A high speed communications system capable ofsupporting a downstream data transmission from an upstream transceiverusing an analog signal consisting of M data carrying signals containedwithin a bandwidth F, said system comprising: a channel interfacecircuit for coupling to and receiving said analog signal; and a frontend receiving circuit for processing the analog signal and converting itto a digital signal; a processing circuit for extracting N data carryingsignals (N<M) from the digital signal using a first frequency portion f1of the digital signal (f1<F).
 2. The system of claim 1 , wherein the Ndata carrying signals are selected by the processing circuit based so asto minimize the amount of processing required to extract the selecteddata from the digital signal.
 3. The system of claim 2 , wherein the Ndata carrying signals can be selected during an initialization processsetting up a data link to the upstream transceiver.
 4. The system ofclaim 3 , wherein M data carrying signals can be sent by the upstreamtransmitter during an initialization process, and thereafter, only Ndata carrying signals are sent.
 5. The system of claim 1 , wherein thefront end circuit includes: (i) a sub-band filter for passing the firstfrequency bandwidth portion f1 of said bandwidth F; (ii) and an analogto digital converter.
 6. The system of claim 1 , wherein the selecteddata further includes data obtained from an additional second frequencybandwidth portion f2 of said bandwidth F, so that an additional numberof data carrying signals P from the M data carrying signals (N+P<M) canbe processed.
 7. The system of claim 6 , further including one or moresub-band filters for passing the first frequency bandwidth portion f1and second frequency bandwidth portion f2 of said bandwidth F and ananalog to digital converter.
 8. The system of claim 7 , wherein a targetdata rate of the system can be increased by processing an additionalnumber of data carrying signals P from the M data carrying signals,where N+P<M.
 9. The system of claim 1 , wherein the selected data to beextracted from the bandpassed data can be controlled by a user of suchsystem.
 10. The system of claim 9 , wherein a user of such system canincrease a target data rate of the system by modularly augmenting thefront end circuit to include additional bandwidth and analog to digitalconversion capacity such that an additional number of data carryingsignals P from the M data carrying signals (N+P<M) can be processed. 11.The system of claim 1 , further including a front end transmittingcircuit for transmitting control information to cause said upstreamtransceiver to transmit downstream data only using the N data carryingsignals.
 12. The system of claim 11 , wherein the control informationtransmitted to the upstream transceiver includes feedback informationindicating that only N of the M data carrying signals are desirable fordownstream data transmission, even during times when said channel iscapable of supporting more than N data carrying signals.
 13. The systemof claim 12 , wherein the control information transmitted to theupstream transceiver further includes feedback information indicatingthat: (i) the system can support any data protocols used by saidupstream transceiver; and (ii) that they are connected through a channelwith substantial signal attenuation characteristics for data signalsother than the N data carrying signals.
 14. The system of claim 1 ,further including a front end transmitting circuit for transmitting anupstream data signal using a second frequency bandwidth F2 differentfrom F, and L data carrying signals, and where L<M.
 15. A high speedcommunications system capable of supporting an upstream transceiverwhich can transmit M modulated sub-channels using an analog signalthrough a channel to said system, said system comprising: a channelinterface circuit for coupling to and receiving said analog signal fromthe channel; an analog front end circuit for processing the analogsignal and converting it to a digital signal, the front end circuitincluding a sub-band filter and an analog to digital converter; aprocessing circuit for extracting data from the digital signal, thedigital signal including data from a first number N of saidsub-channels, where N≦M.
 16. The system of claim 15 , wherein theselected data is derived from the N sub-channels which minimize theamount of processing required to extract the selected data from thedigital signal.
 17. The system of claim 16 , wherein the N sub-channelscan be selected by an initialization process to set up a data link tothe upstream transceiver.
 18. The system of claim 17 , wherein the Msub-channels can be received from the upstream transmitter during aninitialization process, and thereafter, only N sub-channels arereceived.
 19. The system of claim 15 , wherein the front end circuitincludes: (i) a sub-band filter for passing only the N sub-channels;(ii) and an analog to digital converter.
 20. The system of claim 15 ,wherein the selected data further includes data obtained from anadditional second number of sub-channels P, so that an additional numberof sub-channels (N+P<M) can be processed.
 21. The system of claim 20 ,further including one or more sub-band filters for passing the firstnumber N and second number P of said sub-channels and an analog todigital converter.
 22. The system of claim 21 , wherein a target datarate of the system can be increased by processing an additional numberof sub-channels P from the M sub-channels, and where N+P<M.
 23. Thesystem of claim 15 , wherein the selected data to be extracted from thebandpassed data can be controlled by a user of such system.
 24. Thesystem of claim 23 , wherein a user of such system can increase a targetdata rate of the system by modularly augmenting the front end circuit toinclude additional bandwidth and analog to digital conversion capacitysuch that an additional second number of sub-channels P from the Msub-channels (N+P<M) can be processed.
 25. The system of claim 24 ,further including a front end transmitting circuit for transmittingcontrol information to cause said upstream transceiver to transmitdownstream data only using the N sub-channels.
 26. The system of claim25 , wherein the control information transmitted to the upstreamtransceiver includes feedback information indicating that only N of theM sub-channels are usable for downstream data transmission, even duringtimes when said channel is capable of supporting more than Nsub-channels.
 27. The system of claim 26 , wherein the controlinformation transmitted to the upstream transceiver further includesfeedback information indicating that: (i) the system can support anydata protocols used by said upstream transceiver; and (ii) that thesystem and upstream transceiver are connected through a channel withsubstantial signal attenuation characteristics for sub-channels otherthan the N sub-channels.
 28. The system of claim 15 , wherein theupstream transceiver uses discrete multi-tone (DMT) modulation forgenerating the M modulated sub-channels, and the channel supportsasymmetric digital subscriber loop (ADSL) transmission standards. 29.The system of claim 15 , further including a front end transmittingcircuit for transmitting an upstream data signal using a second set ofsub-channels L separate from M, where L<M.
 30. A high speedcommunications data receiver for communicating through a channel at adata rate X with an upstream transmitter capable of transmitting a datastream at a rate Y (X<Y), the receiver comprising: a channel interfacecircuit for coupling to and receiving said data stream; and an analogfront end circuit for data sampling the analog signal and converting itto a digital signal; and a processing circuit for extracting selecteddata from the digital signal, and for generating a transmission controlsignal for causing said upstream transmitter to transmit at a data ratesubstantially equal to said data rate X during a data streamtransmission; and wherein data sampling requirements of the analog frontend circuit and extracting of the processing circuit are reduced becausedata sampling and extracting is only performed for a fractional portionof the data stream.
 31. The system of claim 30 , wherein the analogfront end circuit further includes one or more sub-band filters forfiltering the analog data signal to generate the fractional portion ofthe data stream that requires data sampling and extracting.
 32. Thesystem of claim 30 , further including a front end transmitting circuitfor transmitting the transmission control signal from the processingcircuit to cause said upstream transceiver to transmit downstream dataonly at said data rate X.
 33. The system of claim 32 , wherein thecontrol information transmitted to the upstream transceiver includesfeedback information indicating that the maximum downstream datatransmission data rate is x, even during times when said channel iscapable of supporting more than said data rate X.
 34. The system ofclaim 30 , further including a front end transmitting circuit fortransmitting an upstream data transmission using a data rate Z, whereZ<Y.
 35. The system of claim 30 , wherein the ratio of X to Y isapproximately 0.5 or less, and this ratio can be increased throughmodular additions to the analog front end circuit.
 36. A high speedcommunications system for processing an analog data signal from achannel capable of supporting a downstream data transmission from anupstream transciever using a bandwidth F, said system comprising: achannel interface circuit for coupling to and receiving said analog datasignal from the channel; and a front end receiving circuit forprocessing the analog data signal and converting it to a digital signal;a processing circuit for extracting selected data from the digitalsignal, the digital signal including data from a first frequencybandwidth portion f1 of said bandwidth and for generating feedbackinformation indicating to the upstream transceiver that the bandwidthother than f1 is unsuitable for data transmission even when said channelcan support said bandwidth F.
 37. The system of claim 36 , wherein thefeedback information contains intentionally altered channelcharacteristic information.
 38. The system of claim 37 , wherein thefeedback information, including the size and center of first frequencybandwidth portion f1, can be controlled by a user of such system. 39.The system of claim 38 , wherein the ratio of f1 to F is approximately0.5 or less, and this ratio can be increased through modular additionsto the front end receiving circuit.
 40. A high speed communicationssystem for transmitting digital information in a channel capable ofsupporting a transmission bandwidth F, said system comprising: anupstream data transceiver capable of modulating the digital informationto generate an analog data signal data transmission using saidtransmission bandwidth F; and a downstream data transceiver channelinterface circuit for coupling to and receiving said analog data signalfrom the upstream data transciever through said channel, the downstreamdata transceiver including: (i) a front end receiving circuit forprocessing the analog data signal and converting it to a digital signal;and (ii) a processing circuit for demodulating the digital signal, thedigital signal including data from a first frequency bandwidth portionf1 of said bandwidth and for generating feedback information indicatingto the upstream transceiver that the bandwidth other than f1 isunsuitable for data transmission; and (iii) a front end transmittingcircuit for transmitting the feedback information using a secondfrequency bandwidth portion f2 to cause said upstream transceiver totransmit downstream data only using the first frequency portion f1. 41.The system of claim 40 , wherein the ratio of f1 to F is approximately0.5 or less, and this ratio can be increased through modular additionsto the front end receiving circuit.
 42. The system of claim 40 , whereinthe feedback information contains intentionally altered channelcharacteristic information.
 43. The system of claim 41 , wherein thefeedback information, including the size and location of first frequencyportion f1, can be controlled by a user of such system.
 44. A method ofoperating a high speed communications system that is coupled to anupstream transceiver through a channel capable of supporting an analogdata transmission having a bandwidth F, said method comprising: (a)receiving said analog data signal from the upstream transceiver throughthe channel; and (b) generating a digital signal based on sampling aportion of the analog data transmission signal corresponding to a firstfrequency bandwidth portion f1; and (c) processing the digital signal toextract data from the digital signal; and (d) generating feedbackinformation indicating to the upstream transceiver that the bandwidthother than f1 should not be used for data transmission, even if ananalog data signal with bandwidth f1 is supportable in the channel. 45.The method of claim 44 , further including a step prior to step (a):receiving a control signal from a user of such system for determiningsize and location of first frequency bandwidth portion f1.
 46. Themethod of claim 44 , further including a step: determining an optimalsize and location of first frequency bandpass portion f1 so as tominimize the amount of processing required to extract the data from thedigital signal.
 47. The method of claim 44 , wherein: step (a) occursduring an initialization period, and said received analog transmissionsignal has a bandwidth F; and after step (d) the upstream transceiveronly transmits an analog data signal within first frequency bandwidthportion f1.
 48. The method of claim 40 , wherein the system transmitsfeedback information containing intentionally altered channelcharacteristic information.
 49. A method of operating a high speedcommunications system that is coupled to an upstream transceiver througha channel capable of supporting an analog data transmission signalincluding M modulated sub-channels, said method comprising: (a)receiving said analog data transmission signal from the upstreamtransceiver through the channel; and (b) generating a digital signalbased on sampling a portion of the analog data transmission signalcorresponding to a first frequency bandwidth portion f1; and (c)processing the digital signal to extract data from N of thesub-channels, where N≦M; and (d) generating feedback informationindicating to the upstream transceiver that the sub-channels other thanthe N sub-channels should not be used for data transmission, even ifsaid channel is capable of supporting more than N sub-channels.
 50. Themethod of claim 49 , further including a step prior to step (a):receiving a control signal from a user of such system for determiningthe identity of the N sub-channels.
 51. The method of claim 49 , furtherincluding a step: determining an optimal set of N sub-channels so as tominimize the amount of processing required to extract the data from thedigital signal.
 52. The method of claim 49 , wherein: step (a) occursduring an initialization period, and said received analog transmissionsignal includes data for M sub-channels; and after step (d) the upstreamtransceiver only transmits an analog data signal using the Nsub-channels.
 53. The method of claim 49 , wherein the system transmitsfeedback information containing intentionally altered channelcharacteristic information.
 54. A method of operating a high speedcommunications system that is coupled through a channel to an upstreamtransceiver operating at a maximum data rate Y using a bandwidth F, saidmethod comprising: (a) receiving an analog initialization signal havinga bandwidth F from the upstream transceiver through the channel; and (b)generating a digital signal based on sampling a portion of the analogdata transmission signal corresponding to a first frequency bandwidthportion f1, where f1<F; and (c) processing the digital signal to extractdata from the digital signal such that an effective receiving rate X(where X<Y) is achieved by the system; (d) generating feedbackinformation pertaining to the channel transmission characteristicsindicating to the upstream transceiver that data rates higher than Xshould not be used; (e) thereafter receiving an analog data signaltransmitted by the upstream transceiver to have a bandwidth f1; (f)repeating steps (b) and (c).
 55. The method of claim 54 , furtherincluding a step prior to step (a): receiving a control signal from auser of such system for determining the effective receiving rate X. 56.The method of claim 54 , further including a step: determining anoptimal bandwidth portion f1 so as to minimize the amount of processingrequired to extract the data from the digital signal at the receivingrate X.